Göm meny
Selected Publications

Dabrowski J. and Qazi F., Spectrum Sensing for Cognitive Radio Based on Flexible RF Filtering, in Proc. of IEEE Intl. Conf. on Signals and Electronic Sys. (ICSES-2016), Cracow, Poland, Sept. 5-7 2016, 6 pp.

Qazi F. and Dabrowski J., Passive SC Sigma Delta Modulators Revisited: Analysis and Design Study, IEEE Journal on Emerging and Selected Topics in Circuits and Systems, Vol.5, No.4 Dec. 2015, pp. 624-637.

 Duong Q-T, Qazi F., and Dabrowski J., Analysis and Design of Low Noise Transconductance Amplifier for Selective Receiver Front-End, Springer, Analog Integrated Circuits and Signal Processing (ALOG), 2015, DOI: 10.1007/s10470-015-0629-5

Qazi F., Duong Q-T, and Dabrowski J., Tunable selective receiver front end with impedance transformation filtering, Wiley, Int. J. Circ. Theor. Appl. pp. (1-23), 2015, DOI: 10.1002/cta.2125

Qazi F. and Dabrowski J., Clock Phase Imbalance and Phase Noise in RF N-path Filters, in European Conference on Circuit Theory and Design (ECCTD), pp. (1-4), 2015

 Qazi F., Duong Q-T, and Dabrowski J., Two-Stage Highly Selective Receiver Front-End Based on Impedance Transformation Filtering, IEEE Transections on Circuits and Systems II, Vol.62, No.5 pp. (421-425), May 2015

 Ramzan R., Dabrowski J., RF Calibration of On-Chip DfT Chain by DC Stimuli and Statistical Multivariate Regression Technique, in Integration, the VLSI Journal, 2014, DOI: 10.1016/j.vlsi.2014.11.006

 Duong Q-T, Dabrowski J., Alvandpour A., Design and Analysis of High Speed Capacitive Pipeline DACs, in Analog Integrated Circuits and Signal Processing, DOI 10.1007/s10470-014-0350-9, 2014

Duong Q-T, Dabrowski J., Alvandpour A., Highly Linear Open-loop Output Driver Design for High Speed Capacitive DACs, in Proc. IEEE Norchip, pp. (1-4), 2013

Duong Q-T, and Dabrowski J., Focused Calibration for Advanced RF Test with Embedded RF Detectors,in European Conference on Circuit Theory and Design (ECCTD), pp. (1-4), 2013

 Qazi F., Duong Q-T, and Dabrowski J., Blocker and Image Reject Low-IF Frontend,in European Conference on Circuit Theory and Design (ECCTD), pp. (1-4), 2013

 Duong Q-T and Dabrowski J., Wideband RF Detector Design for High Performance On-Chip Test, in Proc. IEEE Norchip, pp. (1-4), 2012

Ahsan N., Svensson C., Ramzan R., Dabrowski J., and Samuelsson C., 1.1 V 6.2 mW, wideband RF Front-end for 0 dBm Blocker Tolerant Receivers in 90 nm CMOS, in Analog Integrated Circuits and Signal Processing, Volume 70, Number 1 (2012), pp. 79-90

Dabrowski J., A/D and D/A data conversion for wireless communications transceivers, in Digital Front-End in Wireless Communications and Broadcasting: Circuits and Signal Processing, Fa-Long Luo (Ed.), Cambridge University Press 2011, (pp.380-412)

 Qazi F., Duong Q-T, and Dabrowski J., Wideband RF Frontend Design for Flexible Radio Receiver, in International Symposium on Integrated Circuits (ISIC), pp. 220-223, December 2011.

 Duong Q-T. and Dabrowski J., Low Noise Transconductance Amplifier Design for Continuous- Time Delta Sigma Wideband Frontend, in European Conference on Circuit Theory and Design (ECCTD), pp. 825 - 828, 2011

 Ahmad S., Dabrowski J., On-Chip Spectral Test for High-Speed ADCs by SD Technique, in European Conference on Circuit Theory and Design (ECCTD), pp. 661 - 664, September 2011.

 Ramzan R., Fritzin J., Dabrowski J., and Svensson C., Wideband Low Reflection Transmission Line for Bare Chip on Multilayer PCB, in ETRI Journal, vol. 33, no. 3, pp. 335-343, June 2011.

 Ahmad S. and Dabrowski J., Cancellation of spurious spectral components in one-bit stimuli generator, IEEE International Conference on Electronics, Circuits and Systems (ICECS), 2010, pp.393 - 96.

 Qazi F. and Dabrowski J., IP2 calibration of ADC for SDR receiver, Proc. International Conf. on Signals and Electronic Systems (ICSES), 2010, pp. 233-236.

 Fazli Yeknami A., Qazi F., Dabrowski J., and Alvandpour A., Design of OTAs for ultra-lowpower sigma-delta ADCs in medical applications, Proc. International Conf. on Signals and Electronic Systems (ICSES), 2010, pp. 229-32.

 Ramzan R., Ahsan N., Dabrowski J., and Svensson C., A 0.5–6GHz low gain linear RF front-end in 90nm CMOS, Proc. 17th International Conference Mixed Design of Integrated Circuits and Systems (MIXDES), June 2010, pp. 168-71

 Ramzan R., Ahsan N., Dabrowski J., On-Chip Stimulus Generator for Gain, Linearity, and Blocking Profile Test of Wideband RF Front Ends, Trans. on Instrumentation and Measurement, Vol.59, Nov. 2010, pp. 2870-2876

 Qazi F., Sundström T., Wikner J., Svensson C., Dabrowski J., A/D Conversion for Software Defined Radio, Proc. of WSR-2010, March 2010, Karlsruhe, Germany, 7 pp.

 Ahmad S., Azizi K., Esmaeil Zadeh I., Dabrowski J., Two-Tone PLL for IP3 on-Chip Test, Proc. of IEEE ISCAS, May 2010, Paris, 4 pp.

 Dabrowski J., Ramzan R., Built-in Loopback Test for IC RF Transceivers, Trans. on VLSI Systems, DOI 10.1109/TVLSI.2009.2019085, December 2009.

 Ahmad S., Dabrowski J., On-Chip Stimuli Generation for ADC Dynamic Test by Sigma-Delta Technique, Proc. of European Conference on Circuit Theory & Design, August 2009, Antalya, Turkey, 4 pp.

 Dabrowski J., Fast BER Test for Digital RF Transceivers, Proc. of European Test Symposium, May 2009, Seville, Spain, 4 pp.

 Ramzan R., Andersson S., Dabrowski J., and Svensson C., Multiband RF-Sampling Receiver Front-End with On-Chip Testability in 0.13µm CMOS, Journal of Analog Integrated Circuits and Signal Processing, DOI 10.1007/s10470-009-9286-x, Feburary 2009.

 Ahsan N., Dabrowski J, and Ouacha A., A Self-Tuning Technique for Optimization of Dual Band LNA, Proc. of IEEE European Microwave Conference (EuMC), October 28-30 2008, Amsterdam, the Netherlands, pp 178-181.

 Ahsan N., Svensson C., and Dabrowski J., Highly Linear Wideband Low Power Current Mode LNA, Proc. of International Conference on Signals and Electronic Systems, September 2008, Krakow, Poland, pp 73-76.

 Ahmad S. and Dabrowski J., ADC on-Chip Dynamic Test by PWM Technique, Proc. of International Conference on Signals and Electronic Systems, September 2008, Krakow, Poland, pp 15-18.

 Ramzan R. and Dabrowski J., On-chip Calibration of RF Detectors by DC Stimuli, Proc. of IEEE Radio Frequency Integrated Circuits (RFIC) Symposium Atlanta Georgia, USA, June 15-17, 2008, 4 pp.

 Andersson S., Ramzan R., Dabrowski J., and Svensson C., Multiband Direct RF Sampling ReceiverFront-End for WLAN in 0.13um CMOS, Proc. of ECCTD, Seville, Spain, 27-29 August 2007, pp.168-171

 Dabrowski J., Ramzan R., Boosting SER Test for RF Transceivers by Simple DSP Technique, Proc.of DATE Conf., Nice, France, 16-20 April 2007 (6 pp.)

Ramzan R., Andersson S., Dabrowski J., and Svensson C., A 1.4V, 25mW Inductorless Wideband LNA in 0.13mm CMOS, Proc.of ISSCC'07, San Francisco, USA, Feb.2007 (2pp)

Ahsan N., Ouacha A., Dabrowski J., and Samuelsson C., Dual band Tunable LNA for Flexible RF Front-End, Proc.of IBCAST Conf., Islamabad, PK, 8-11 Jan. 2007, (4 pp)

Dabrowski J., RF On-chip test by Reconfiguration Technique, in Proc.of WSEAS Conf. Athens, Greece, 10-12 July, 2006, (6 pp)

 Ramzan R. and Dabrowski J., CMOS RF/DC Voltage Detector for on-Chip Test, in Proc.of IEEE International Multitopic Conference (INMIC), Islamabad, Pakistan, December 2006, pp. 472-476

Dabrowski J., Andersson S., Konopacki J., Svensson C., SC Filter design for RF applications, Proc.of ICSES 2006, Lodz, Poland, 17-22 Sept. 2006, 4 pp.

Dabrowski J. and Ramzan R., Offset loopback Test for IC RF Transceivers, Proc.of MIXDES Conf. 2006, Gdynia, Poland, 22-24 June, 2006, 4 pp.

Andersson S., Konopacki J.Dabrowski J., Svensson C., Noise Analysis and Noise Estimation of an RF Sampling Front-end Using an SC Decimation Filter, Proc.of MIXDES Conf. 2006, Gdynia, Poland, 22-24 June, 2006, 6 pp.

 Andersson S., Konopacki J.Dabrowski J., Svensson C., SC Filter for RF Sampling and Downconversion with Wideband Image Rejection, Int. J. Analog Integrated Circuits and Signal Processing, Kluwer-Springer, 2006, Vol. 49, pp. 115-122

Andersson S., Konopacki J., Dabrowski J., Svensson C., SC Filter for RF Downconversion with Wideband Image Rejection, Proc. ISCAS?06, Island of Kos, Greece, 21-24 May 2006, 4 pp.

Ramzan R., Dabrowski J., CMOS Blocks for on-Chip RF Test, Int. J. Analog Integrated Circuits and Signal Processing, Kluwer-Springer, 2006, Vol. 49, pp. 151-160

Ramzan R., Zou L., Dabrowski J., LNA Design for on-Chip RF Test, Proc.- ISCAS?06, Island of Kos, Greece, 21-24 May 2006, 4 pp.

Jakonis D., Folkesson K., Dabrowski J., Eriksson P., Svensson C., A 2.4-GHz RF Sampling Receiver Front-end in 0.18µm CMOS, IEEE J. of Solid-State Circuits, Vol. 40, Issue 6, June 2005, pp. 1265-1277.

Ramzan R. , Dabrowski J. , CMOS Blocks for on-Chip RF Test, Proc.of MIXDES Conf. 2005, Krakow, Poland, 22-25 June, 2005, 6 pp.

Dabrowski J., Gonzalez Bayon J., Techniques for Sensitizing RF Path under SER Test, Proc. ISCAS '05, Kobe, Japan, May 23-26, 2005, 4 pp.

Kantasuwan T., Ramzan R., Dabrowski J., Programmable RF Attenuator for On-Chip loopback Test, Proc. ETS'05, Tallin, Estonia, May 22-25, 2005, 6 pp.

Folkesson K., Jakonis D., Svensson Ch., Dabrowski J., Eriksson P., An RF sampling downconversion filter for a receiver front-end, in Proceedings of MWSCAS, pp. I-165-I-168, Hiroshima, Japan, 2004.

Folkesson K., Jakonis D., Dabrowski J., Svensson C., Design of RF sampling receiver front-end, Proc.of MIXDES 2004, pp. 538-543, Szczecin, Poland, 2004.

Dabrowski J., Gonzalez Bayon J., Mixed Loopback BiST for Digital Transceivers, Proc. DFT '04, Cannes, France, Oct. 11-13, 2004, 9 pp.

Dabrowski J., Li L., Signal Path Sensitization for BiST in Integrated RF Transceivers, Proc. Intl. Conf. on Design and Diagnosis of Electronic Circuits & Systems, (DDECS'04), Tatranska Lomnica, Slovakia, April 18-21, 2004, 8 pp.

Dabrowski J. , Fault Modeling in RF Blocks Based on Noise Analysis, Proc. ISCAS '04, Vancouver, Canada, May 23-26, 2004, 4 pp.

Dabrowski J., Loopback BiST for RF Front-End in Digital Transceivers, Intl. Symposium System-on-Chip, (SoC?03), Tampere, Finland, Nov. 19-21, 2003, 4 pp.

Dabrowski J., BiST Model for IC RF-Transceiver Front-End, Intl. Symposium on Defect & Fault Tolerance in VLSI Systems, (DFT?03), Cambridge, MA, USA, Nov. 3-5, 2003, 8 pp.

Jakonis D., Dabrowski J., Svensson C., Noise Analysis of Downconversion Sampling Mixer, Proc.of ECCTD 2003, Krakow, Poland, Sept. 2003, 4 pp.

Jakonis D., Folkesson K., Dabrowski J., Svensson C., Downconversion Sampling Mixer for wideband Low-IF Receiver, Proc.of MIXDES 2003, Lodz, Poland, June 2003, 6 pp.

Dabrowski J., Efficient Post-Layout Timing Verification via RLC Trees and Explicit PWL Timing Integration, Proc.of ECECS 2002, Dubrovnik, Croatia, Sept.2002 (4 pp)

Dabrowski J., Pulka A., Efficient Modeling of Analog and Mixed A/D Systems via Piece-wise Linear Technique, in Electronic Chips & System Design, Jean Mermet Ed., Kluwer Academic Publisher, The CHDL Series, Boston 2001, pp.43-54

Dabrowski J., RLC Tree-Based Interconnect Modeling for Sub-Micron VLSI Timing Verification, Proc. of MIXDES 2001, Zakopane, Poland, June 2001, pp. 407-412

Dabrowski J., Waveform Relaxation Approach to PWL Simulation of Analog and Mixed A/D Networks at the Functional Level, IEE Proc. Circuits, Devices and Systems, Vol.148, No 3, June, 2001, pp.145-150

Dabrowski J., Efficient Interconnect Timing Analysis via Piecewise Linear Technique, Proc.of ISCAS'2000, Geneva, Switzerland, May 2000, pp.V.469-V.472

Janczak T., Dabrowski J., Behavioral Synthesis of Mixed-Signal Systems Using Programmable Analog Devices, Proc.of MIXDES'2000, Gdynia, Poland, June, 2000, pp.165-170

Dabrowski J., Piecewise Linear Approach to Functional-Level Macrosimulation of Analogue & Mixed A/D Systems (monograph), Silesian University of Technology, Trans. on Electronics, No 11, Gliwice, 2000, (130 pages)

Dabrowski J., Explicit PWL Integration Techniques for Analog Simulation, Proc. of ICSES 2000, Ustron , Poland, Oct.2000, pp.447-452

Dabrowski J., Synthesis of Functional-Level Analog Models with PWL Technique, Proc. of MIXDES’99, Kraków, Poland, June 1999, pp. 243-246

Dabrowski J., Pulka A., Experiences with Modeling of Analog and Mixed A/D Systems Based on PWL Technique, Proc.of DATE’99, Munich, Germany, March 1999, pp.790-791

Dabrowski J., Functional-level Analogue Macromodelling with Piecewise Linear Signals, IEE Proceedings Circuits, Devices and Systems, Vol.146, No.2, April 1999, pp.77-82

Dabrowski J., Pulka A., Network Designing with Analog Programmable Devices, Proc.of 21st National Conf. Circuit Theory & Electronic Circuits, Poland, Poznan-Kiekrz, Oct.1998, pp. 149-154

Dabrowski J., Pulka A., Discrete Approach to PWL Analog Modeling in VHDL Environment, Analog Integrated Circuits and Signal Processing, Kluwer Academic Pub. Vol.16, No 2, June 1998, pp. 91-99

Dabrowski J., Pulka A., Efficient Modeling of Analog & Mixed A/D Systems via Piece-wise Linear Technique, Proc.of FDL’98, Lausanne, Switzerland,1998, pp. 295-304

Dabrowski J., Waveform Relaxation Approach to PWL Simulation of Analog and Mixed A/D Networks at the Functional Level, Proc.of ECCTD’97, Budapest, Hungary, Sept.1997, pp. 507-512

Dabrowski J., Konopacki J., Implementation of A/D Network Macromodels in PWL Functional-Level Simulator, Bull.of the Polish Academy of Sciences, Technical Sciences, Vol.44, No.3, 1996, pp. 293-312

Dabrowski J., Functional-Level Analog Macromodeling with Piecewise Linear Signals, Proc.of EURO-DAC’95, Brighton, England, 1995, pp.306-311

Dabrowski J., Konopacki J., Delay Models for Mixed-Mode Timing Verification of Bipolar Circuits, Proc.of 16th National Conf. TOiUE, Kolobrzeg, Poland, Oct.1993, pp.193-198

Dabrowski J., Konopacki J.: HYBRID: A Mixed-Mode Simulator for A/D Networks, Proc. of 15th National Conf. TOiUE, Szczyrk, Poland, 1992, pp.103-108

Dabrowski J., Efficient Timing Verification via Mixed-Mode Technique, Microprocessing & Microprogramming Vol 34. 1992, North-Holland, pp.183-186

Dabrowski J., Konopacki J.: Experience with Block Waveform Relaxation for Analog Networks , Proc. of 14th National Conf. TOiUE, Waplewo, Poland 1991, pp.145-150

Dabrowski J.,Konopacki J., A New Structure for LF Square Wave Amplification, Electronic Engineering, Dec. 1989, pp.27-28

Dabrowski J., Design of Multilevel Mixed Mode Simulator for LSI/VLSI Circuits, Proc.of ISCAS'88, Helsinki, Finland, 1988, pp. 1685 1688

Dabrowski J.,Konopacki J., A/D Converter for Square Wave Amplitude Measurement, Electronic Engineering, Sept. 1986, pp.34-35

Dabrowski J., Analog Integrated Circuits Macromodeling via Orthogonal Function Expansion, Proc. of ECCTD’85, Praque, 1985, pp.145-148

Kontakt:

Tjänst:
Universitetslektor, Docent
Adress:
Institutionen för systemteknik
Linköpings Universitet
581 83 Linköping
Telefon:
013-281224
Fax:
013-139282
Kontor:
B-huset, 3A:457
E-post:
< >


Informationsansvarig: Jerzy Dabrowski
Senast uppdaterad: 2016-09-22