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Mario Garrido

Associate Professor
"It is disturbing to think how many situations are incompletely understood because attempts at explanation persist in using well-tried familiar patterns which ought themselves to be reexamined.", Edward de Bono in New think , 1968.


RESEARCH

I have a long experience in the implementation of fast Fourier transform (FFT) hardware architectures. In my research I have covered all the areas that this research topic consists on: FFT algorithms, pipelined FFT architectures (SDF, MDC, SC), iterative FFT architectures, rotators (CORDIC, multiplier-based), circuits for data management (bit reversal, bit-dimension permutations), and other transforms.


TEACHING

Courses
  1. TSIU03: System Design / Systemkonstruktion, LIU
    (Years 2018, 2017, 2016, 2014, 2013, 2012)
  2. TSEA22: Digitalteknik, LIU, (Years 2018, 2017, 2016, 2014)
  3. TSIU05: Digitalteknik, LIU, (Years 2017, 2016, 2014)
  4. TMEL53: Switching Circuits and Logical Design, LIU, (Year 2017)
  5. TMEL08: Electrical Systems, LIU, (Years 2014, 2013, 2011(x2))
  6. TSTE12: Design of Digital Systems, LIU (Years 2012, 2011, 2010)
  7. TSTE85: Low Power Electronics, LIU (Year 2010)

PUBLICATIONS

Publications in Google Scholar: Mario Garrido
Journal Papers
  1. Hans Kanders, Tobias Mellqvist, Mario Garrido, Kent Palmkvist and Oscar Gustafsson "A 1 Million-Point FFT on a Single FPGA", IEEE Transactions on Circuits and Systems I: Regular Papers, Accepted for publication.
  2. Mario Garrido, Jesús Grajal and Oscar Gustafsson. "Optimum Circuits for Bit-Dimension Permutations", IEEE Transactions on VLSI. (PDF in IEEE Xplore)
  3. Mario Garrido, "Multiplexer and Memory-Efficient Circuits for Parallel Bit Reversal", IEEE Trans. Circuits Systems II: Express Briefs, Vol. 66, No. 4, pp 657-661, Apr. 2019. (PDF in IEEE Xplore, PDF in LIU)
  4. Mario Garrido, Konrad Möller and Martin Kumm, "World's Fastest FFT Architectures: Breaking the Barrier of 100 GS/s", IEEE Trans. Circuits Systems I: Regular Papers, Vol. 66, No. 4, pp 1507-1516, Apr. 2019. (PDF in IEEE Xplore, PDF in LIU)
  5. Mario Garrido, Nanda K. Unnikrishnan and Keshab K. Parhi, "A Serial Commutator Fast Fourier Transform Architecture for Real-Valued Signals", IEEE Transactions on Circuits and Systems Part II: Express Briefs, Vol. 65, No. 11, pp 1693-1697, Nov. 2018. (PDF in IEEE Xplore, PDF in LIU)
  6. Martin Kumm, Oscar Gustafsson, Mario Garrido and Peter Zipf, "Optimal Single Constant Multiplication using Ternary Adders", IEEE Transactions on Circuits and Systems II: Express Briefs, Vol. 65, No. 7, pp 928-932, July 2018.(PDF in IEEE Xplore)
  7. Konrad Möller, Martin Kumm, Mario Garrido and Peter Zipf, "Optimal Shift Reassignment in Reconfigurable Constant Multiplication Circuits", Transactions on Computer-Aided Design of Integrated Circuits and Systems, Vol. 37, No. 3, pp. 710-714, Mar. 2018. (PDF in IEEE Xplore, PDF in LIU)
  8. Mario Garrido, Shen-Jui Huang and Sau-Gee Chen, "Feedforward FFT Hardware Architectures based on Rotator Allocation", IEEE Transactions on Circuits and Systems I: Regular Papers, Vol. 65, No. 2, pp. 581-592, Feb. 2018. (PDF in IEEE Xplore, PDF in LIU)
  9. Mario Garrido, Miguel Ángel Sánchez, María Luisa López-Vallejo and Jesús Grajal, "A 4096-point Radix-4 Memory-Based FFT using DSP Slices", IEEE Transactions on Very Large Scale Integration (VLSI) Systems, Vol. 25, No. 1, pp. 375-379, Jan. 2017. (PDF in IEEE Xplore, Open Access, Citing Documents)
  10. Mario Garrido, "A new Representation of FFT Algorithms using Triangular Matrices", IEEE Transactions on Circuits and Systems I: Regular Papers, Vol. 63, No. 10, pp. 1737-1745, Oct. 2016. (PDF in IEEE Xplore, Open Access, Citing Documents)
  11. Mario Garrido, Shen-Jui Huang, Sau-Gee Chen and Oscar Gustafsson, "The Serial Commutator (SC) FFT", IEEE Transactions on Circuits and Systems II: Express Briefs, Vol. 63, No. 10, pp. 974-978, Oct. 2016. (PDF in IEEE Xplore, Open Access, Citing Documents)
  12. Mario Garrido, Rikard Andersson, Fahad Qureshi and Oscar Gustafsson, "Multiplierless Unity-Gain SDF FFTs", IEEE Transactions on VLSI, Vol. 24, No. 9, pp. 3003-3007, Sep. 2016. (PDF in IEEE Xplore, Open Access, Citing Documents)
  13. Mario Garrido, "The Feedforward Short-Time Fourier Transform", IEEE Transactions on Circuits and Systems II: Express Briefs, Vol. 63, No. 9, pp. 868-872, Sep. 2016. (PDF in IEEE Xplore, Open Access)
  14. Mario Garrido, Petter Kallstrom, Martin Kumm, Oscar Gustafsson, "CORDIC II: A New Improved CORDIC Algorithm", IEEE Transactions on Circuits and Systems II: Express Briefs, Vol. 63, No. 2, pp. 186-190, Feb. 2016. (PDF in IEEE Xplore, Open Access, Citing Documents)
  15. Sau-Gee Chen, Shen-Jui Huang, Mario Garrido and Shyh-Jye Jou, "Continuous-flow Parallel Bit-Reversal Circuit for MDF and MDC FFT Architectures", IEEE Transactions on Circuits and Systems I: Regular Papers, Vol. 61, No. 10, pp. 2869-2877, Oct. 2014. (PDF in IEEE Xplore, Open Access, Citing Documents)
  16. Mario Garrido, Fahad Qureshi and Oscar Gustafsson, "Low-Complexity Multiplierless Constant Rotators Based on Combined Coefficient Selection and Shift-and-Add Implementation (CCSSI)", IEEE Transactions on Circuits and Systems I: Regular Papers, Vol. 61, No. 7, Pages 2002-2012, July 2014. (PDF in IEEE Xplore, Open Access, Citing Documents)
  17. Mario Garrido and Jesús Grajal, "Continuous-flow variable-length memoryless linear regression architecture", Electronics Letters, Vol. 49, Issue 24, Pages 1567-1569, Nov 2013. (PDF in IEEE Xplore, Open Access, Citing Documents)
  18. Fahad Qureshi, Mario Garrido and Oscar Gustafsson, "Unified architecture for 2, 3, 4, 5, and 7-point DFTs based on Winograd Fourier transform algorithm", Electronics Letters, Vol. 49, Issue 5, Pages 348-349, May 2013. (PDF in IEEE Xplore, Open Access, Citing Documents)
  19. Mario Garrido, Jesús Grajal, M.A. Sánchez and O. Gustafsson, "Pipelined Radix-2k Feedforward FFT Architectures", IEEE Transactions on Very Large Scale Integration Systems, Vol. 21, Issue 1, Pages 23-32, Jan 2013. (PDF in IEEE Xplore, Open Access, Citing Documents)
  20. Mario Garrido, Jesús Grajal and Oscar Gustafsson, "Optimum Circuits for Bit Reversal", IEEE Transactions on Circuits and Systems II: Express Briefs, Vol. 58, Issue 10, Pages 657-661, Oct. 2011. Nominated to the best paper award 2011. (PDF in IEEE Xplore, Open Access, Citing Documents)
  21. Mario Garrido, Oscar Gustafsson and Jesús Grajal, "Accurate Rotations Based on Coefficient Scaling", IEEE Transactions on Circuits and Systems II: Express Briefs, Vol. 58, Issue 10, Pages 662-666, Oct. 2011. (PDF in IEEE Xplore, Open Access, Citing Documents)
  22. Mario Garrido, Keshab K. Parhi and Jesús Grajal, "A Pipelined FFT Architecture for Real-Valued Signals", IEEE Transactions on Circuits and Systems I: Regular Papers, Vol. 56, Issue 12, Pages 2634-2643, Dec. 2009 (PDF in IEEE Xplore, Open Access, Citing Documents)
  23. Miguel Ángel Sánchez, Mario Garrido, María Luisa López-Vallejo and Jesús Grajal, "Implementing FFT-based Digital Channelized Receivers on FPGA Platforms", IEEE Transactions on Aerospace and Electronic Systems, Volume 44, Issue 4, Pages 1567-1585, Oct. 2008. (PDF in IEEE Xplore, Open Access, Citing Documents)
Book Chapteres
  1. M. Garrido, F. Qureshi, J. Takala, and O. Gustafsson. "Hardware architectures for the fast Fourier transform", In S. S. Bhattacharyya, E. F. Deprettere, R. Leupers, and J. Takala, editors, Handbook of Signal Processing Systems. Springer, third edition, 2019.
Guest Editorials
  1. M. Garrido, M. L. López-Vallejo and S.-G. Chen, "Guest editorial: Special section on fast Fourier transform (FFT) hardware implementations", J. Signal Proc. Systems, Vol. 90, No. 11, pp. 1581-1582, Nov. 2018. (Open Access)
Patents
  1. Mario Garrido and Andreas Öhlin, "Device and method for performing a Fourier transform on a three dimensional data set", SE 539721. Publication date: 07.11.2017. Priority date: 09.07.2014. Priority number: SE1450880. (PDF)
  2. Mario Garrido and J. Grajal, "Procedimiento y Arquitectura de Circuito en Pipeline para el Cálculo de la Regresión Lineal" (Procedure and Pipelined Hardware Architecture for Computing the Linear Regression), ES 2365883. Publication date: 13.10.2011. Priority date: 20.05.2009. Priority number: ES20090001256. (PDF)
  3. Mario Garrido and J. Grajal, "Storage-free Method and Architecture for Computing FFT Rotations", WO 2008/125708. Publication date: 16.03.2008. Priority date: 12.04.2007. Priority number: ES20070000983. (PDF)
International Conference Papers
  1. Nanda K. Unnikrishnan, Mario Garrido and Keshab K. Parhi, "Effect of Finite Word-Length on SQNR, Area and Power for Real-Valued Serial FFT" IEEE International Symposium on Circuits and Systems, Sapporo (Japan), May 2019.
  2. M. Gokhale, C. Bae, O. Gustafsson and M. Garrido, "Improved Implementation Approaches for 512-tap 60 GSa/s Chromatic Dispersion FIR Filters", IEEE Asilomar Conference on Signals, Systems, and Computers, Pacific Grove, CA (United States), Oct. 2018.
  3. N. Mohammadi, O. Gustafsson and M. Garrido, "Obtaining Minimum Depth Sum of Products from Multiple Constant Multiplication", IEEE International Workshop on Signal Processing Systems, Cape Town (South Africa), Oct. 2018.
  4. A. Kovalev, O. Gustafsson and M. Garrido, "Implementation Approaches for 512-tap 60 GSa/s Chromatic Dispersion FIR Filters", IEEE Asilomar Conf. Signals Systems Computers, Pacific Grove, CA (US), Nov. 2017.
  5. M. Garrido, M. Acevedo, A. Ehliar and O. Gustafsson, "Challenging the Limits of FFT Performance on FPGAs", International Symposium on Integrated Circuits (ISIC-2014), Singapore, December 2014, pp. 172-175. Invited Paper. (PDF in IEEE Xplore, Open Access, Citing Documents)
  6. V. Iglesias, J. Grajal, O. Yeste-Ojeda, M. Garrido, M.A. Sánchez, M.L. López-Vallejo, "Real-time Radar Pulse Parameter Extractor", Radar Conference, Cincinnati, OH (USA), May 2014, pp. 371-375.
  7. S. Ambuluri, M. Garrido, G. Caffarena, J. Ogniewski and I. Ragnemalm, "New Radix-2 and Radix-22 Constant Geometry Fast Fourier Transform Algorithms For GPUs", IADIS Computer Graphics, Visualization, Computer Vision and Image Processing (CGVCVIP) Conference, Prague (Czech Republic), July 2013, pp. 59-66. Best paper award. (Open Access)
  8. P.P. Boopal, M. Garrido and O. Gustafsson, "A Reconfigurable FFT Architecture for Variable-Length and Multi-Streaming OFDM Standards", IEEE International Symposium on Circuits and Systems (ISCAS), Beijing (China) May 2013, pp. 2066-2070. (PDF in IEEE Xplore, Open Access)
  9. P. Källström, M. Garrido, O. Gustafsson, "Low-complexity rotators for the FFT using base-3 signed stages," IEEE Asia Pacific Conference on Circuits and Systems, Kaoshiung (Taiwan), Dec. 2012, pp. 519-522. (PDF)
  10. T. Ahmed, M. Garrido and O. Gustafsson, "A 512-point 8-parallel pipelined feedforward FFT for WPAN", IEEE Asilomar Conference on Signals, Systems, and Computers, Pacific Grove, CA (United States), Nov. 2011. (PDF)
  11. J. Grajal, O.A. Yeste, M.A. Sánchez, M. Garrido and M.L. López-Vallejo, "Real Time FPGA Implementation of an Modulation Classifier for Electronic Warfare Applications", European Signal Processing Conference, Barcelona (Spain), Aug. 2011.
  12. F. Qureshi, M. Garrido and O. Gustafsson, "Alternatives for Low-Complexity Complex Rotators", IEEE International Conference on Electronics, Circuits, and Systems (ICECS'10), Athens (Greece), Dec. 2010. (PDF)
  13. Mario Garrido and J. Grajal, "Efficient Memoryless CORDIC for FFT Computation", IEEE International Conference on Acoustics, Speech, and Signal Processing (ICASSP'07), vol. 2, pp. II-113 - II-116, Honolulu (United States), Apr. 2007. (PDF in IEEE Xplore, Open Access, Citing Documents)
  14. M.A. Sánchez, M. Garrido, M. L. López-Vallejo and C. López-Barrio,"Design Space Exploration of FPGA-based FFT Architectures based on Area and Power estimation", IEEE International Conference on Field Programmable Technology (FPT'06), Bangkok (Thailand), Dec. 2006.
  15. M.A. Sánchez, M. Garrido, M. L. López-Vallejo and C. López-Barrio, "Fast and Accurate Estimation of Area and Power for FPGA-based Signal Processing Architectures", Intenational Conference on Design of Circuits and Integrated Systems (DCIS'06), Barcelona (Spain), Nov. 2006.
  16. M.A. Sánchez, M. Garrido, M. L. López-Vallejo, J. Grajal and C. López-Barrio, "Implementing the Monobit FFT on FPGA Platforms", Intenational Conference on Design of Circuits and Integrated Systems (DCIS'05), Lisboa (Portugal), Nov. 2005.
  17. M.A. Sánchez, M. Garrido, M. L. López-Vallejo, J. Grajal and C. López-Barrio, "Digital Channelisad Receivers on FPGAs Platforms". IEEE Radar Conference, Pages 816-821, Washington D.C. (EEUU), May 2005. (PDF, Citing Documents)
  18. M.A. Sánchez, M. Garrido, M. L. López-Vallejo and J. Grajal, "Implementing the FFT Algorithm on FPGA Platforms: A Comparative Study of Parallel Architectures", International Conference on Design of Circuits and Integrated Systems (DCIS'04), Bourdeaux (France), Nov. 2004.
Supervised Theses
  1. Hans Kanders and Tobias Mellqvist, "One Million-Point FFT", Master Thesis, Dpt. of Electrical Engineering, Linköping University. Date of reading: 15/02/2018.
  2. Herman Lundkvist and Alexander Yngve, "Accelerated Simulation of Modelica Models Using an FPGA-Based Approach", Master Thesis, Dpt. of Electrical Engineering, Linköping University. Date of reading: 13/12/2017.
  3. Miguel Acevedo Sanz, "FPGA Based Hardware-In-The-Loop co-simulator platform for SystemModeler", Master Thesis, Dpt. of Electrical Engineering, Linköping University. Date of reading: 25/11/2016.
  4. Andreas Öhlin, "Real-Time Multi-Dimensional Fast Fourier Transforms on FPGAs", Master Thesis, Dpt. of Electrical Engineering, Linköping University. Date of reading: 12/06/2015.
  5. Rikard Andersson, "FFT Hardware Architectures with Reduced Twiddle Factor Sets", Master Thesis, Dpt. of Electrical Engineering, Linköping University. Date of reading: 26/06/2014.
  6. Mattias Eriksson, "Design and Implementation of a Real-Time FFT-core for Frequency Domain Triggering (in Digitizer Applications)", Master Thesis, Dpt. of Electrical Engineering, Linköping University. Date of reading: 30/08/2013.
  7. Miguel Acevedo Sanz, "Implementation of Building Blocks to Make Up FFT Architectures", Bachelor Thesis, Dpt. of Electrical Engineering, Linköping University. Date of reading: 17/06/2013.
  8. Sreehari Ambuluri, "Implementations of the FFT algorithm on GPU", Master Thesis, Dpt. of Electrical Engineering, Linköping University. Date of reading: 19/12/2012.
  9. Christoffer Peters, "Evaluation of the Achronix picoPIPE Architecture in High Performance Applications", Master Thesis, Dpt. of Electrical Engineering, Linköping University. Date of reading: 30/11/2012.
  10. Parthasarathy Murali Baskar Rao, "Implementation of an industrial process control interface for the LSC11 system using Lattice ECP2M FPGA" Master Thesis, Dpt. of Electrical Engineering, Linköping University. Date of reading: 07/11/2012.
  11. David Guinart Platero, "Deterministic Analysis of the Accuracy in FFT Hardware Architectures", Master Thesis, Dpt. of Electrical Engineering, Linköping University. Date of reading: 07/06/2012.
  12. Fahad Qureshi, "Optimization of Rotations in FFTs", PhD Thesis, Dpt. of Electrical Engineering, Linköping University, Date of reading: 01/03/2012.
  13. Padmaprasad Boopal, "A Recongurable FFT Architecture for Variable Length and Multi-streaming WiMax Wireless OFDM Standards", Master Thesis, Dpt. of Electrical Engineering, Linköping University. Date of reading: 30/09/2011.
  14. Tanvir Ahmed, "High Level Model of IEEE 802.15.3c Standard and Implementation of FFT on ASIC", Dpt. of Electrical Engineering, Master Thesis, Linköping University. Date of reading: 19/05/2011.

Kontakt:

Tjänst:
Universitetslektor
Adress:
Institutionen för systemteknik
Linköpings Universitet
581 83 Linköping
Telefon:
+46 13 28 4025
Fax:
+46 13 13 9282
Kontor:
B-huset, Campus Valla, Ingång B-25, Rumsnummer 3B:550

Min privata sida:
Mario Garrido


Informationsansvarig: Mario Garrido
Senast uppdaterad: 2019-05-16