Petter Källström

Research engineer.
(Prior: PhD Student within the field digital arithmetic and frequency synthesis)

Teaching

Courses I teach in (ht=fall semester, vt=spring semester)

• TSIU03 - System Design, ht1, Di3/El3 (en).
• TSEA51 - Digitalteknik, ht1, Y1 (sv).
• TSIU05 - Digitalteknik, ht1, El1 (sv).
• TSEA84 - Digital system design, ht, D5/Y5 (en).
• TSEA52 - Digitalteknik, ht, I3 (sv).
• TSEA29 - Konstruktion med mikrodatorer, ht, D3/Di3/El2/IT4 (sv).
• TSEA22 - Digitalteknik, vt1, D1 (sv).
• TSEA48 - Datorteknik, vt1, IT2 (sv).
• TSEA56 - Elektronik kandidatprojekt, vt, Y3/I3 (sv).
• TSEA28 - Datorteknik, vt, Y2/U1 (sv).
• TSEA83 - Datorkonstruktion, vt, D2 (sv).
• TSTE87 - Application Specific Integrated Circuit for DSP, vt2, D4/Y4 (en).
• TSEA82 - Datorteknik, vt2, D2 (sv).
• TSEA57 - Datorteknik, vt2, I3 (sv).

Courses I do no longer teach in (reservation for broken links).

• TMMI04 - Elektroteknik (sv)
• TMEL08 - Eltekniska System (sv).
• TSTE58/TSTE20/TSTE21 - Elektronik (sv).
• TSEI01 - Analog Elektronik (sv).
• TSEI06 - Kretsteori (sv).
• TSKS06 - Linjära system och kommunikation (sv).

Some documents I've written, related to VHDL:

• "A Fairly Small VHDL Guide" - a brief explanation of VHDL for synthesis.
• "A Tiny VHDL Guide" - even smaller guide.
• "The Mystery Delta Cycle" - explains how VHDL works from a simulation point of view.

Research (prior)

My primary research is spread over different types of frequency synthesis (how to generate sinusoids as pure as possible), how to increase performances in FPGAs, and hardware arithmetics over all.
I have done some related animations and published here.

Publications

The papers I am (co)author of are

• TCAS I: Petter Källström, Oscar Gustafsson. Status: Revision stall.
  "Magnitude Scaling for Increased Spurious Free Dynamic Range in Digital Frequency Synthesis" (abstract)
• TVLSI: C. Ingemarsson, P. Källström, F. Qureshi, O. Gustafsson.
  "Efficient FPGA-Mapping of Pipeline SDF FFT Cores" (abstract)
• FPL 2016: Petter Källström, Oscar Gustafsson.
  "Fast and Area Efficient Adder for Wide Data in Recent Xilinx FPGAs" (abstract)
• TCAS II 2015: Mario Garrido, Petter Källström, Martin Kumm, Oscar Gustafsson.
  "CORDIC II: A New Improved CORDIC Algorithm" (abstract)
• APCCAS 2012: Petter Källström, Mario Garrido, Oscar Gustafsson.
  "Low-complexity rotators for the FFT using base-3 signed stages" (abstract)
• FPL 2012: Carl Ingemarsson, Petter Källström, Oscar Gustafsson.
  "Using DSP block pre-adders in pipeline SDF FFT implementations in contemporary FPGAs" (abstract)
• Norchip 2011: Petter Källström, Oscar Gustafsson.
  "Magnitude Scaling for Increased SFDR in DDFS" (abstract)
• Master thesis: Petter Källström.
  "Direct Digital Frequency Synthesis in Field-Programmable Gate Arrays"

Schedule

My schedule are defined in two places; My Google Calendar and sometimes a booking calendar outside my office.
If you want to book a meeting with me, try the calendar outside my door and send me a mail about it at least 24 hours before the meeting and hope I accept the meeting.

Education

I received my Master of Computer Technology (profile: electronics) from Linköpings University in 2010.
I did my master thesis about DDFS in FPGAs, and how to optimize different design parameters to each others.
Since then I'm a PhD student, earlier in the Electronics Systems division (ES), and now in the Computer Engineering division (DA) of the Department of Electrical Engineering (ISY).